Interview Question - Physical Design (PD) | Clock Skew

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 Interview Question (PD):


Consider a design that has undergone floor-planning, placement, Clock Tree Synthesis (CTS), and routing, complete Physical Design (PD) activity. After multiple iterations to fix timing, two runs have been generated: Run A with zero skew (practically not possible, but assume) and Run B with a skew of 50ps. Both runs meet the required timing specifications. Which run is the good one? Can we go ahead with the zero skew run, or should we opt for the run with some skew? What are the disadvantages of going with the zero skew run?


In particular, are there any potential issues with the zero skew run that could lead to reliability or performance problems down the line? For example, might the zero skew run be more sensitive to process, voltage, and temperature (PVT) variations, IR drop or more prone to clock signal degradation? On the other hand, does the run with some skew provide a more realistic and robust clock distribution network that can better withstand variations and uncertainties?


Answer:


While it may seem counterintuitive, the run with zero skew (Run A) may not necessarily be the better choice, even if it meets the required timing specifications. Here's why:

  1. Unrealistic expectations: Achieving zero skew in a real-world design is practically impossible due to various sources of uncertainty, such as process variations, voltage drops (IR drop), and temperature gradients. By aiming for zero skew, you may be setting yourself up for disappointment or, worse, a design that is overly sensitive to these variations.
  2. Over-optimization: A zero-skew design may require over-optimization of the clock tree, which can lead to a more complex and sensitive design. This, in turn, can increase the risk of clock signal degradation, jitter, and other timing issues. Additionally, over-optimization can also lead to increased IR drop, which can further exacerbate timing issues and reduce the overall reliability of the design.
  3. Lack of margin: A design with zero skew may not have enough margin to accommodate unexpected variations or changes in the design. This can make it more difficult to adapt to changes or fix issues that arise during manufacturing or testing. Furthermore, a design with zero skew may be more susceptible to IR drop-related issues, which can lead to reduced performance and reliability.
  4. Increased power consumption: A zero-skew design may require more power to drive the clock signal, which can increase power consumption and heat generation. This, in turn, can lead to increased IR drop, which can further reduce the overall performance and reliability of the design.

On the other hand, the run with some skew (Run B) may provide a more realistic and robust clock distribution network that can better withstand variations and uncertainties. A small amount of skew (e.g., 50ps) can actually be beneficial in providing a buffer against unexpected variations and changes. Additionally, a design with some skew may be less susceptible to IR drop-related issues, as it can provide a more balanced and robust clock distribution network.


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