compile-vlsi

Lakhs of Base DRC at Floorplan/Placement database: Let's say you are working on one of the complex blocks of chip designing and you are responsible for closing the Place-and-Route (PnR) activity of the design. You are responsible for doing floor-planning, placement, clock tree synthesis, routing, and signoff activities. Floorplan is one of the most important tasks in physical design activities. One of the major tasks in floor-planning is macro placement, identification, and creation of physical power domains based on UPF, doing power planning including placement of physical cells like tap cells, boundary cells, power switches, guard rings, marker cells, and a few others. Let's say you completed the floor-planning and are ready to go for placement. Before going to the placement run, have you done sanity checks to ensure that your floorplan is completely clean and okay? For a sanity check with respect to physical violations, don't consider timing as of now to limit the discus...

Longer Routing Length | Physical Design | Tcl Scripting In the routing stage of physical design, one of the most important sanity checks is to find out the length of the longer nets. However, EDA tools optimize the length of each net to meet its timing and DRC requirements. Despite their best efforts, EDA tools may not always optimize net lengths due to various reasons such as complexity of the design, limited visibility into the design's timing and signal integrity requirements, inadequate or incomplete design constraints, insufficient optimization algorithms or resources, and trade-offs between different design objectives. What is the impact of longer routing lengths on timing? Longer routing lengths lead to greater delay and can cause timing violations. To mitigate timing violations due to longer routing lengths, techniques such as layer promotion can be used, where the tool promotes the net to a higher metal layer based on needs and violations to meet the timing requirements....

Power Switches in VLSI Design | Interview Question PD | Oct 1 2024 Question: What are the different power switches used in VLSI design? How do bulk power switches differ from distributed power switches? What is the importance of power switches in IR drop analysis? How do power switches handle current during the transition from off to on power domain? What is rush current, and how do power switches handle it? What is ramp-up time, and how is it related to power switches? Sub-questions: Types of Power Switches:  What are the different types of power switches used in VLSI design, and what are their characteristics?                                                                                                          ...